Advances in semiconductor manufacturing technology and design methodologies are enabling the development of complex system-on-chip (SOCs) devices with millions of transistors. Designers seeking to leapfrog the competition with superior performance at lower cost are embedding custom logic blocks and large third-party intellectual property (IP) elements such as 32- and even 64-bit processor cores into large single chip solutions. These solutions promise the twin advantages of faster time to market and lower product costs, but come with some significant new development and debug issues that threaten the viability of SOCs.