As expected, Intel Corp. took the wraps off two new Itanium 2 processors Monday that will tide the company over until the expected launch of its first dual-core Itanium processor later this year.
The Santa Clara, California, company added two 1.66GHz Itanium 2 processors, one with 9M bytes of Level 3 cache and the other with 6M bytes of Level 3 cache, to its lineup Monday. Sources told IDG News Service last week about the pending debut of the new chips, which are notable for their 667MHz front-side bus, a faster link between the CPU (central processing unit) and the system’s main memory.
On chips without an integrated memory controller, like Intel’s, the front-side bus is a crucial pathway between the processor and the rest of the system.
A faster link means more data can be processed and sent to memory, improving overall system performance for memory-intensive applications. Rival Advanced Micro Devices Inc. has introduced an integrated memory controller for its Opteron server chips that directly connects the processor to memory. This has proven to be a very efficient way to get data back and forth to memory, and Intel is expected to use a similar design in coming years.
But in the meantime, the faster front-side bus will improve the performance of high-end servers that use the Itanium 2 processor. It also allows Intel’s server partners to build the 667MHz front-side bus into chipsets that will support Montecito, the first dual-core Itanium processor expected later this year. Analysts saw the faster bus as crucial for Montecito, which contains two separate processing cores and will require a quick connection to memory to keep those cores running efficiently.
The chip with 9M bytes of Level 3 cache costs US$4,655 and the chip with 6M bytes of Level 3 cache costs $2,194, both in quantities of 1,000 units, Intel said. Hitachi is expected to use the chips in its BladeSymphony servers within 30 days, according to Intel.
