Researchers at Hewlett-Packard Co. (HP) believe they have developed a manufacturing technique that will allow chip makers to push the performance envelope after conventional transistors reach the atomic level.
The technique, based on a mathematical principle called coding theory, will let future generations of microprocessor circuits be reliably manufactured in high volumes, according to HP.
Developed as part of HP Labs’ “crossbar latch” research project, which aims to replace the microprocessor transistor within the decade, the technique will be described in the June 6 issue of the Institute of Physics’ Nanotechnology publication.
Rather than using transistors, crossbar latch circuits will use microscopic wires known as nanowires that are placed at a right angle to a separate set of parallel nanowires. This creates an electrical field that can be switched between two states, creating the “1” and “0” bits necessary for computing.
A nanowire is a solid tube that can be as thin as the width of a single carbon atom.
Basically, HP has discovered a method of ensuring that these silicon nanowires can continue to function even if manufacturing defects partially sever the connection between the crossbar and the rest of the circuit, said Stan Williams, a senior fellow and director of HP’s Quantum Research Lab.
This is an important advance, as the crossbar design will only catch on with chip makers if it can be reliably manufactured in high volumes, said Phil Kuekes, a senior computer architect at HP. And in order to do that, HP needs to make sure it can work around manufacturing defects that inevitably crop up in the manufacturing process, he said.
Enter coding theory, a mathematical technique that helps a digital signal travel down a noisy wire without losing its clarity. Developed by Claude Shannon, a researcher with Bell Labs and the Massachusetts Institute of Technology in the 1940s and 1950s, coding theory involves adding small pieces of information to a transmission in order to ensure the data is accurately received, Kuekes said.
Mobile phones already transmit information using coding theory, Williams said. A mobile phone turns a user’s voice into digital bits of information, which are then sent through the air to a receiver. To make sure those digital bits of information are properly reassembled into speech, the phone adds small pieces of information to the packets of digital bits that help identify each bit and prevent calls from garbling the message, he said.
Much in the way coding theory is used to clear up mobile phone calls, it could also be used to keep processors running, even if they are marred with tiny manufacturing flaws.
HP’s crossbar latch is a relatively straightforward design, but it will be implemented in extremely complex circuits that can be difficult to manufacture. The connections between the crossbar and the rest of the circuit can sometimes break in the manufacturing process, leaving the circuit with only a partial connection to individual nanowires through a device HP calls the demultiplexer.
That could cause bits of information to disappear or become scrambled in transmission, and render the chip useless. However, the application of coding theory and a few extra wires to the demultiplexer will help HP circumvent the problem, Williams said.
“This is about having an architecture that will work in the presence of defects,” Williams said.
HP has demonstrated its new crossbar design in a computer simulation, but it has also built prototype devices that work using the technology. The crossbar architecture is expected to first appear in chips built using the 22 nanometer process technology, which is expected to be adopted by the microprocessor industry around 2016.
The size of the manufacturing process refers to the average size of a feature on the chip. Leading-edge chip makers are currently using a 90 nm manufacturing process.
